This invention relates to control mechanisms and storage addressing mechanisms for digital computer systems and digital data processing systems and, while not limited thereto, is particularly useful for microprocessors, microcontrollers and the like.
Microprocessors are comprised of one or two or a few Large Scale Integration (LSI) integrated circuit semiconductor chips. The normal objective is to cram everything onto as few chips as is possible. Because of the space limitations and the compromises that must be made to get as much as possible onto a single chip, microprocessors typically have somewhat limited capabilities as to the amount of storage that can be addressed and the number of independent internal and external control functions and selection functions which can be provided. It is a purpose of this invention to provide a mechanism for alleviating some of these limitations in an efficient and flexible manner and with a minimum of added circuitry on the chip.
A good example of the problem being considered is the storage addressing capability of a microprocessor. As with all processors, a decision has to be made as to the number of instruction bits that will be alloted for storage addressing purposes. The larger the number of address bits, the greater the amount of storage that can be addressed. However, the larger the number of address bits, the greater is the amount of circuitry that must be provided for addressing purposes. Thus, for the case of microprocessors, the choice is usually made to use a storage address having a relatively small number of bits as compared to previous practices with larger size processors. A more or less typical choice is to use a twelve bit storage address. This allows for the direct addressing of up to 4096 storage locations. This is not a very large amount of storage and, in many applications, it would be desirable to provide the microprocessor with a much larger storage capability.
It is a purpose of the present invention to provide a new and improved control mechanism which can be used, if desired, to extend the storage addressing range of a microprocessor beyond that which is addressable by the storage address in the program instructions, that is, by the storage address length (number of address bits) used in the various program instructions which include a storage address field. With this mechanism, the storage addressing range can be increased by a multiple of 2, 4, 8, or 16 with a minimal amount of added circuitry and with very little impact on the performance of the microprocessor.
Although the physical space limitations are not as stringent, it is believed that the present invention can also be used to good advantge in larger scale data processors for accomplishing various control functions in a more economical and efficient manner.